vegeta@lemmy.world to Technology@lemmy.worldEnglish · 2 days agoHackers can steal 2FA codes and private messages from Android phonesarstechnica.comexternal-linkmessage-square47linkfedilinkarrow-up1224arrow-down117cross-posted to: hackernews@lemmy.bestiver.se
arrow-up1207arrow-down1external-linkHackers can steal 2FA codes and private messages from Android phonesarstechnica.comvegeta@lemmy.world to Technology@lemmy.worldEnglish · 2 days agomessage-square47linkfedilinkcross-posted to: hackernews@lemmy.bestiver.se
minus-squareChaosMonkey@lemmy.dbzer0.comlinkfedilinkEnglisharrow-up12·1 day agoThat wouldn’t be too bad. There could be a new permission for precise time.
minus-squareA Basil Plant@lemmy.worldlinkfedilinkEnglisharrow-up2·edit-28 hours ago…and there you go: https://ccs25files.zoolab.org/main/ccsfb/1REOCPAR/3719027.3765061.pdf https://misc0110.net/files/exfilstate_ccs25.pdf From https://www.sigsac.org/ccs/CCS2025/accepted-papers/ (#378) Literally published less than a day ago: ExfilState: Automated Discovery of Timer-Free Cache Side Channels on ARM CPUs At the same conference (CCS) that the paper referred to by the ars technica article was accepted.
minus-squareA Basil Plant@lemmy.worldlinkfedilinkEnglisharrow-up5·edit-28 hours agoYou can implement a counting-thread that’s even more precise than the CPU’s timer (TSC on x86) platforms. This was shown in attacks on Intel SGX, where the rdtsc instruction to access the time-stamp counter is unavailable. https://link.springer.com/chapter/10.1007/978-3-319-60876-1_1 https://arxiv.org/pdf/1702.08719 If you remove access to the timer, attackers will simply build one.
That wouldn’t be too bad. There could be a new permission for precise time.
…and there you go:
https://ccs25files.zoolab.org/main/ccsfb/1REOCPAR/3719027.3765061.pdf
https://misc0110.net/files/exfilstate_ccs25.pdf
From https://www.sigsac.org/ccs/CCS2025/accepted-papers/ (#378)
Literally published less than a day ago:
At the same conference (CCS) that the paper referred to by the ars technica article was accepted.
You can implement a counting-thread that’s even more precise than the CPU’s timer (TSC on x86) platforms. This was shown in attacks on Intel SGX, where the rdtsc instruction to access the time-stamp counter is unavailable.
https://link.springer.com/chapter/10.1007/978-3-319-60876-1_1
https://arxiv.org/pdf/1702.08719
If you remove access to the timer, attackers will simply build one.